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A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.

C. Ju, T. Liu, H. Wang, Y. Chang, C. Wang, C. Hsieh, B. Liu, H. Lin, C. Cheng, C. Chen, M. Chiu, S. Wang, P. Chao, M. Hu, R. Yeh, T. Chuang, H. Lin, and C. Tsai. VLSIC, page 1-2. IEEE, (2014)

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Kuei-Yung Chang

Yung-Hui Chang

Yung-Hsien Chang

Yung-Chang Chen

Other publications of authors with the same name

A 0.5 nJ/Pixel 4 K H.265/HEVC Codec LSI for Multi-Format Smartphone Applications.C. Ju, T. Liu, K. Lee, Y. Chang, H. Chou, C. Wang, T. Wu, H. Lin, Y. Huang, C. Cheng and 17 other author(s). IEEE J. Solid State Circuits, 51 (1): 56-67 (2016)Assessing automotive functional safety microprocessor with ISO 26262 hardware requirements.Y. Chang, L. Huang, H. Liu, C. Yang, and C. Chiu. VLSI-DAT, page 1-4. IEEE, (2014)A 775-µW/fps/view H.264/MVC decoder chip compliant with 3D Blu-ray specifications.C. Ju, T. Liu, Y. Chang, C. Wang, C. Chen, H. Lin, C. Cheng, M. Chiu, S. Wang, P. Chao and 3 other author(s). ISCAS, page 1440-1443. IEEE, (2012)Filter-based Deep-Compression with Global Average Pooling for Convolutional Networks.T. Hsiao, Y. Chang, and C. Chiu. SiPS, page 247-251. IEEE, (2018)On the design and analysis of fault tolerant NoC architecture using spare routers.Y. Chang, C. Chiu, S. Lin, and C. Liu. ASP-DAC, page 431-436. IEEE, (2011)A 2.6mm2 0.19nJ/pixel VP9 and multi-standard decoder LSI for Android 4K TV applications.C. Ju, T. Liu, Y. Chang, C. Wang, C. Cheng, H. Lin, C. Chen, M. Chiu, P. Chao, M. Wu and 13 other author(s). ESSCIRC, page 109-112. IEEE, (2016)Filter-based deep-compression with global average pooling for convolutional networks.T. Hsiao, Y. Chang, H. Chou, and C. Chiu. J. Syst. Archit., (2019)Fault-Tolerant Mesh-Based NoC with Router-Level Redundancy.Y. Chang, C. Gong, and C. Chiu. J. Signal Process. Syst., 92 (4): 345-355 (2020)A 0.7mm2 8.54mW FocusNet Display LSI for Power Reduction on OLED Smart-phones.T. Liu, C. Tsai, S. Shih, C. Chang, J. Lin, W. Hsieh, Y. Chang, and C. Ju. A-SSCC, page 53-56. IEEE, (2019)A multi-format Blu-ray player SoC in 90nm CMOS.C. Ju, T. Liu, C. Yang, S. Lin, K. Lan, C. Wu, T. Wei, C. Lien, J. Wu, C. Hsiao and 34 other author(s). ISSCC, page 152-153. IEEE, (2009)

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Disambiguation of "Chang, Yung-Chang"

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A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.

Please choose a person to relate this publication to

Kuei-Yung Chang

Yung-Hui Chang

Yung-Hsien Chang

Yung-Hsien Chang

Yung-Chang Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chang, Yung-Chang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.

Please choose a person to relate this publication to

Kuei-Yung Chang

Yung-Hui Chang

Yung-Hsien Chang

Yung-Hsien Chang

Yung-Chang Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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MSOffice XML

A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver.