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A 2.666GT/s 128GB/s 14nm Memory I/O with Jitter and Crosstalk Cancellation.

, , , , , , и . A-SSCC, стр. 21-24. IEEE, (2019)

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Muljono

Muljono Soerowidjojo

Walther Harry

Tjoe Muljono

Klaus-Peter Harry

 

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Itanium 2 Processor 6M: Higher Frequency and Larger L3 Cache., , и . IEEE Micro, 24 (2): 10-18 (2004)Power reduction techniques for an 8-core xeon® processor., , , , , , , , , и . ESSCIRC, стр. 340-343. IEEE, (2009)A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache., , , , , , , , , и 2 other автор(ы). IEEE J. Solid State Circuits, 42 (1): 17-25 (2007)A 45nm 8-core enterprise Xeon® processor., , , , , , , , и . ISSCC, стр. 56-57. IEEE, (2009)A 2.666GT/s 128GB/s 14nm Memory I/O with Jitter and Crosstalk Cancellation., , , , , , и . A-SSCC, стр. 21-24. IEEE, (2019)ItaniumTM Processor system bus design., , и . IEEE J. Solid State Circuits, 36 (10): 1565-1573 (2001)SkyLake-SP: A 14nm 28-Core xeon® processor., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 34-36. IEEE, (2018)AC IO Loopback Design for High Speed µProcessor IO Test., , , , , , , , и . ITC, стр. 23-30. IEEE Computer Society, (2004)Augmenting ESD and EOS physical analysis with per pin ESD and leakage DFT., , , и . ISQED, стр. 20-24. IEEE, (2018)A 22 nm 15-Core Enterprise Xeon® Processor Family., , , , , , , , , и . IEEE J. Solid State Circuits, 50 (1): 35-48 (2015)