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Clock-aware ultrascale FPGA placement with machine learning routability prediction: (Invited paper).

C. Pui, G. Chen, Y. Ma, E. Young, and B. Yu. ICCAD, page 929-936. IEEE, (2017)

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Chen Chen

Shih Chen Chen

Yi-Chen Chen

Chen-Loung Chen

Other publications of authors with the same name

Reproducible evaluation of Pan-Tilt-Zoom tracking.G. Chen, P. St-Charles, W. Bouachir, G. Bilodeau, and R. Bergevin. ICIP, page 2055-2059. IEEE, (2015)Dim Sum: Light Clock Tree by Small Diameter Sum.G. Chen, and E. Young. DATE, page 174-179. IEEE, (2019)Dr. CU: Detailed Routing by Sparse Grid Graph and Minimum-Area-Captured Path Search.G. Chen, C. Pui, H. Li, and E. Young. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (9): 1902-1915 (2020)AMF-Placer 2.0: Open Source Timing-driven Analytical Mixed-size Placer for Large-scale Heterogeneous FPGA.T. Liang, G. Chen, J. Zhao, S. Sinha, and W. Zhang. CoRR, (2022)A two-step search engine for large scale boolean matching under NP3 equivalence.C. Pui, P. Tu, H. Li, G. Chen, and E. Young. ASP-DAC, page 592-598. IEEE, (2018)TreeNet: Deep Point Cloud Embedding for Routing Tree Construction.W. Li, Y. Qu, G. Chen, Y. Ma, and B. Yu. ASP-DAC, page 164-169. ACM, (2021)Reproducible Evaluation of Pan-Tilt-Zoom Tracking.G. Chen, P. St-Charles, W. Bouachir, T. Joeisseint, G. Bilodeau, and R. Bergevin. CoRR, (2015)RippleFPGA: Routability-Driven Simultaneous Packing and Placement for Modern FPGAs.G. Chen, C. Pui, W. Chow, K. Lam, J. Kuang, E. Young, and B. Yu. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 37 (10): 2022-2035 (2018)Clock-aware ultrascale FPGA placement with machine learning routability prediction: (Invited paper).C. Pui, G. Chen, Y. Ma, E. Young, and B. Yu. ICCAD, page 929-936. IEEE, (2017)FIT: Fill Insertion Considering Timing.B. Jiang, X. Zhang, R. Chen, G. Chen, P. Tu, W. Li, E. Young, and B. Yu. DAC, page 221. ACM, (2019)

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Disambiguation of "Chen, Gengjie"

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Clock-aware ultrascale FPGA placement with machine learning routability prediction: (Invited paper).

Please choose a person to relate this publication to

Chen Chen

Chen Chen

Shih Chen Chen

Yi-Chen Chen

Chen-Loung Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Gengjie"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Clock-aware ultrascale FPGA placement with machine learning routability prediction: (Invited paper).

Please choose a person to relate this publication to

Chen Chen

Chen Chen

Shih Chen Chen

Yi-Chen Chen

Chen-Loung Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Clock-aware ultrascale FPGA placement with machine learning routability prediction: (Invited paper).