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Disambiguation of "Neishaburi, Mohammad Hossein"

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A UML Based System Level Failure Rate Assessment Technique for SoC Designs.

, , , and . VTS, page 243-248. IEEE Computer Society, (2007)

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Mohammad Hossein Salabian

Mohammad Hossein Kassrawi

Mohammad Hossein Nikfarjam

Djamilian Mohammad Hossein

Mohammad Hossein Adeli

 

Other publications of authors with the same name

HW/SW architecture for soft-error cancellation in real-time operating system., , , and . IEICE Electron. Express, 4 (23): 755-761 (2007)Reliability aware NoC router architecture using input channel buffer sharing., and . ACM Great Lakes Symposium on VLSI, page 511-516. ACM, (2009)Hierarchical Embedded Logic Analyzer for Accurate Root-Cause Analysis., and . DFT, page 120-128. IEEE Computer Society, (2011)A UML Based System Level Failure Rate Assessment Technique for SoC Designs., , , and . VTS, page 243-248. IEEE Computer Society, (2007)An infrastructure for debug using clusters of assertion-checkers., and . Microelectron. Reliab., 52 (11): 2781-2798 (2012)System on chip failure rate assessment using the executable model of a system., and . Computing, 97 (6): 611-629 (2015)Distributing Congestions in NoCs through a Dynamic Routing Algorithm based on Input and Output Selections., , , , , and . VLSI Design, page 546-550. IEEE Computer Society, (2007)Debug Aware AXI-based Network Interface., and . DFT, page 399-407. IEEE Computer Society, (2011)Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC., , , , , , and . IOLTS, page 205-206. IEEE Computer Society, (2007)Enabling efficient post-silicon debug by clustering of hardware-assertions., and . DATE, page 985-988. IEEE Computer Society, (2010)