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Disambiguation of "Takamiya, Makoto"

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A 40-nm 8T SRAM with selective source line control of read bitlines and address preset structure.

, , , , , and . CICC, page 1-4. IEEE, (2013)

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Teruko Takamiya

Makoto Yamamoto

Makoto Nakamura

Makoto Arai

Makoto Ida

 

Other publications of authors with the same name

Reducing IR drop in 3D integration to less than 1/4 using Buck Converter on Top die (BCT) scheme., , , , , , , and . ISQED, page 210-215. IEEE, (2013)A 1.8V 30nJ adaptive program-voltage (20V) generator for 3D-integrated NAND flash SSD., , , , , , and . ISSCC, page 238-239. IEEE, (2009)Energy efficient design and energy harvesting for energy autonomous systems.. VLSI-DAT, page 1-3. IEEE, (2015)An 11-nW CMOS Temperature-to-Digital Converter Utilizing Sub-Threshold Current at Sub-Thermal Drain Voltage., , , and . IEEE J. Solid State Circuits, 54 (3): 613-622 (2019)IGBT Power Module Design for Suppressing Gate Voltage Spike at Digital Gate Control., , , , , and . IEEE Access, (2023)A 95mV-startup step-up converter with Vth-tuned oscillator by fixed-charge programming and capacitor pass-on scheme., , , , , , , , and . ISSCC, page 216-218. IEEE, (2011)A 80-mV input, fast startup dual-mode boost converter with charge-pumped pulse generator for energy harvesting., , , , , , and . A-SSCC, page 33-36. IEEE, (2011)0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS., , , , , , , and . CICC, page 1-4. IEEE, (2010)Session 3 - Power management., and . CICC, IEEE, (2008)Digital Active Gate Drive with Optimal Switching Patterns to Adapt to Sinusoidal Output Current in a Full Bridge Inverter Circuit., , , , , , , and . IECON, page 1684-1689. IEEE, (2019)