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Disambiguation of "Doris, Kostas"

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F6: Pushing the performance limit in data converters organizers: Venkatesh Srinivasan, Texas Instruments, Dallas, TX.

, , , and . ISSCC, page 515-517. IEEE, (2017)

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Philippos Doris

Kostas Buraselis

Kostas Michaelides

Kostas Papamantellos

Françoise Dorison

 

Other publications of authors with the same name

F6: Pushing the performance limit in data converters organizers: Venkatesh Srinivasan, Texas Instruments, Dallas, TX., , , and . ISSCC, page 515-517. IEEE, (2017)Session 22 overview: Gigahertz data converters: Data converter subcommittee., , and . ISSCC, page 356-357. IEEE, (2018)A dynamic latched comparator for low supply voltages down to 0.45 V in 65-nm CMOS., , , and . ISCAS, page 2737-2740. IEEE, (2012)15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS., , , and . ISSCC, page 1-3. IEEE, (2015)An 11b 1GS/s ADC with parallel sampling architecture to enhance SNDR for multi-carrier signals., , , , , , , and . ESSCIRC, page 121-124. IEEE, (2013)A novel analysis of the beam squinting in wideband phased array digital I/Q transmitters., , , and . ECCTD, page 1-4. IEEE, (2020)Time Interleaved ADC Mismatch Error Correction Technique in I/Q Digital Beamforming Receivers., , , , and . ISCAS, page 1-5. IEEE, (2021)Session 27 overview: Hybrid and nyquist data converters., and . ISSCC, page 454-455. IEEE, (2016)A Novel 2-Dimensional Correction Method for mm-Wave Cartesian I/Q Modulators., , , , , and . ISCAS, page 1-5. IEEE, (2021)An 11b 3.6GS/s time-interleaved SAR ADC in 65nm CMOS., , , , , , , , and . ISSCC, page 464-465. IEEE, (2013)