Author of the publication

Energy and Loss-aware Selective Updating for SplitFed Learning with Energy Harvesting-Powered Devices.

, , and . J. Signal Process. Syst., 94 (10): 961-975 (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Data storage time sensitive ECC schemes for MLC NAND Flash memories., , , and . ICASSP, page 2513-2517. IEEE, (2013)A low power scheduling scheme with resources operating at multiple voltages., and . IEEE Trans. Very Large Scale Integr. Syst., 10 (1): 6-14 (2002)T-BFA: Targeted Bit-Flip Adversarial Weight Attack., , , , , and . IEEE Trans. Pattern Anal. Mach. Intell., 44 (11): 7928-7939 (2022)Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs., , , , , and . IEEE Des. Test, 37 (6): 79-87 (2020)Articulation constrained learning with application to speech emotion recognition., , , , and . EURASIP J. Audio Speech Music. Process., (2019)Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 57 (4): 986-998 (2022)Communication and Computation Reduction for Split Learning using Asynchronous Training., , and . SiPS, page 76-81. IEEE, (2021)Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks., , , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (2): 34:1-34:22 (2022)Automated Parallel Kernel Extraction from Dynamic Application Traces., , and . CoRR, (2020)Impact of On-Chip Interconnect on In-Memory Acceleration of Deep Neural Networks., , , , , and . CoRR, (2021)