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Disambiguation of "Kawaguchi, Hiroshi"

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A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing.

, , , , , , , and . IEICE Trans. Electron., 91-C (4): 543-552 (2008)

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Hirokazu Kawaguchi

Hiroshi Kawabe

Hiroshi Murata

Hiroshi Kubota

Hiroshi Uchida

 

Other publications of authors with the same name

Aggregation Efficiency-Aware Greedy Incremental Tree Routing for Wireless Sensor Networks., , , , , and . IEICE Trans. Commun., 89-B (10): 2741-2751 (2006)Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM's., , , , , , , , , and . IEICE Trans. Electron., 88-C (4): 760-767 (2005)7T SRAM Enabling Low-Energy Instantaneous Block Copy and Its Application to Transactional Memory., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 94-A (12): 2693-2700 (2011)A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing., , , , , , , and . IEICE Trans. Electron., 91-C (4): 543-552 (2008)Signal contributions to heavily diffusion-weighted functional magnetic resonance imaging investigated with multi-SE-EPI acquisitions., , , , , , , and . NeuroImage, (2014)Non-contact and noise tolerant heart rate monitoring using microwave doppler sensor and range imagery., , , , and . EMBC, page 6118-6121. IEEE, (2015)A 40-nm 0.5-V 12.9-pJ/Access 8T SRAM using low-power disturb mitigation technique., , , , , , and . ASP-DAC, page 77-78. IEEE, (2013)A physical unclonable function chip exploiting load transistors' variation in SRAM bitcells., , , and . ASP-DAC, page 79-80. IEEE, (2013)A 19-μA metabolic equivalents monitoring SoC using adaptive sampling., , , , , , , , and . ASP-DAC, page 37-38. IEEE, (2017)A 7T/14T Dependable SRAM and its Array Structure to Avoid Half Selection., , , , , and . VLSI Design, page 295-300. IEEE Computer Society, (2009)