( en | de | ru )

 

Disambiguation of "Miura, Yukiya"

Author of the publication

copydeleteadd this publication to your clipboard
On estimation of NBTI-Induced delay degradation.

, , , , , and . European Test Symposium, page 107-111. IEEE Computer Society, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Naotomo Miura

Kota Miura

Yuzuru Miura

 

Other publications of authors with the same name

Development of FF Circuits for Measures Against Power Supply Noise., , and . IOLTS, page 48-51. IEEE, (2019)A Low-Loss Built-In Current Sensor., and . J. Electron. Test., 14 (1-2): 39-48 (1999)Simulation of resistive bridging fault to minimize the presence of intermediate voltage and oscillation in CMOS circuits., , and . Asian Test Symposium, page 120-124. IEEE Computer Society, (2000)Dual Edge Triggered Flip-Flops for Noise Blocking and Application to Signal Delay Detection., and . Asian Test Symposium, page 119-124. IEEE Computer Society, (2012)Current Testable Design of Resistor String DACs., , , , and . ATS, page 399-403. IEEE, (2007)Hybrid Rocket Engine Design Using Pairwise Ranking Surrogate-assisted Differential Evolution., , , and . GECCO Companion, page 1956-1962. ACM, (2023)A Case Study of Mixed-Signal Integrated Circuit Testing: An Application of Current Testing Using the Upper Limit and the Lower Limit., , and . ISCAS, page 77-80. IEEE, (1994)Simulation-based analysis of FF behavior in presence of power supply noise., and . IOLTS, page 151-156. IEEE, (2017)Ramp Voltage Testing for Detecting Interconnect Open Faults.. IEICE Trans. Inf. Syst., 91-D (3): 700-705 (2008)LSI aging estimation using ring oscillators., and . ETS, page 1-2. IEEE, (2015)