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Disambiguation of "Kameyama, Michitaka"

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Path Planning Based on Distance Transformation and Its VLSI Implementation.

, and . J. Robotics Mechatronics, 12 (5): 527-533 (2000)

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Michitaka Ota

Shin'ichi Kameyama

 

Other publications of authors with the same name

Low-power multiple-valued current-mode integrated circuit with current-source control and its application., , and . ASP-DAC, page 413-418. IEEE, (1997)An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture., , , and . ASP-DAC, page 89-90. IEEE, (2011)Interconnection-Free Biomolecular Computing., , and . Computer, 25 (11): 41-50 (1992)A Multi-Context FPGA Using a Floating-Gate-MOS Functional Pass-Gate and Its CAD Environment., and . APCCAS, page 1803-1806. IEEE, (2006)Optimization of LNN Reversible Circuits Using an Analytic Sifting Method., , and . J. Circuits Syst. Comput., 30 (9): 2150166:1-2150166:23 (2021)Dual-rail/single-rail hybrid logic design for high-performance asynchronous circuit., , , and . ISCAS, page 3017-3020. IEEE, (2012)Design of a Collision Detection VLSI Processor Based on Minimization of Area-Time Products., and . ICRA, page 3691-3696. IEEE Computer Society, (1998)Asynchronous Domino Logic Pipeline Design Based on Constructed Critical Data Path., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (4): 619-630 (2015)Implementation of Voltage-Mode/Current-Mode Hybrid Circuits for a Low-Power Fine-Grain Reconfigurable VLSI., and . IEICE Trans. Electron., 97-C (10): 1028-1035 (2014)Data-Transfer-Aware Design of an FPGA-Based Heterogeneous Multicore Platform with Custom Accelerators., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 98-A (12): 2658-2669 (2015)