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A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors.

, , , , , , , , и . IEEE J. Solid State Circuits, 34 (5): 712-716 (1999)

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Charles Woei-Jye Yee

Hernani Tiago Yee Madeira

Sun Yee

Nicole Yee

Yeong Hui Yee

 

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Clock-Delayed Domino for Adder and Combinational Logic Desig., и . ICCD, стр. 332-337. IEEE Computer Society, (1996)Clock-delayed domino for dynamic circuit design., и . IEEE Trans. Very Large Scale Integr. Syst., 8 (4): 425-430 (2000)Domino logic synthesis using complex static gates., , и . ICCAD, стр. 242-247. ACM / IEEE Computer Society, (1998)A third-generation SPARC V9 64-b microprocessor., , , , , , , , , и 21 other автор(ы). IEEE J. Solid State Circuits, 35 (11): 1526-1538 (2000)An Automated Shielding Algorithm and Tool For Dynamic Circuits., , , , и . ISQED, стр. 369-374. IEEE Computer Society, (2000)Output Prediction Logic: A High-Performance CMOS Design Technique., , , , и . ICCD, стр. 247-254. IEEE Computer Society, (2000)Design and Synthesis of Monotonic Circuits., , и . ICCD, стр. 569-572. IEEE Computer Society, (1999)A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors., , , , , , , , и . IEEE J. Solid State Circuits, 34 (5): 712-716 (1999)Locally clocked pipelines and dynamic logic., , и . IEEE Trans. Very Large Scale Integr. Syst., 10 (1): 58-62 (2002)Delay Minimization and Technology Mapping of Two-Level Structures and Implementation Using Clock-Delayed Domino Logic., , и . DATE, стр. 277-282. IEEE Computer Society / ACM, (2000)