Author of the publication

Reducing memory interference in multicore systems via application-aware memory channel partitioning.

, , , , and . MICRO, page 374-385. ACM, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

The design and use of simplepower: a cycle-accurate energy estimation tool., , , and . DAC, page 340-345. ACM, (2000)Using Task Recomputation During Application Mapping in Parallel Embedded Architectures., , and . CDES, page 29-35. CSREA Press, (2006)Hybrid-comp: A criticality-aware compressed last-level cache., , , and . ISQED, page 25-30. IEEE, (2018)Increasing on-chip memory space utilization for embedded chip multiprocessors through data compression., , and . CODES+ISSS, page 87-92. ACM, (2005)A compiler approach for reducing data cache energy., , , and . ICS, page 76-85. ACM, (2003)A Compiler Algorithm for Optimizing Locality in Loop Nests., , and . International Conference on Supercomputing, page 269-276. ACM, (1997)Verifiable annotations for embedded java environments., and . CASES, page 105-114. ACM, (2005)Soft error and energy consumption interactions: a data cache perspective., , , , and . ISLPED, page 132-137. ACM, (2004)Exploiting program hotspots and code sequentiality for instruction cache leakage management., , , , and . ISLPED, page 402-407. ACM, (2003)Estimating influence of data layout optimizations on SDRAM energy consumption., , , , , and . ISLPED, page 40-43. ACM, (2003)