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Disambiguation of "Takagi, Naofumi"

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Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation.

, , , , , , , , and . IEICE Trans. Electron., 97-C (3): 132-140 (2014)

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Tsuyoshi Takagi

Mariko Takagi

 

Other publications of authors with the same name

Dividers., and . The VLSI Handbook, CRC Press, (1999)Recap of the 22nd Asia and South- Pacific Design Automation Conference.. IEEE Des. Test, 34 (3): 103-104 (2017)A fast addition algorithm for elliptic curve arithmetic in GF(2n) using projective coordinates., and . Inf. Process. Lett., 76 (3): 101-103 (2000)High-Throughput Rapid Single-Flux-Quantum Circuit Implementations for Exponential and Logarithm Computation Using the Radix-2 Signed-Digit Representation., , and . IEICE Trans. Electron., 99-C (6): 703-709 (2016)Design and High-Speed Demonstration of Single-Flux-Quantum Bit-Serial Floating-Point Multipliers Using a 10kA/cm2 Nb Process., , , , , , and . IEICE Trans. Electron., 97-C (3): 188-193 (2014)A Hardware Algorithm for Integer Division Using the SD2 Representation., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (10): 2874-2881 (2006)A Hardware Algorithm for Modular Multiplication/Division Based on the Extended Euclidean Algorithm., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (12): 3610-3617 (2005)A Reconfigurable Data-Path Accelerator Based on Single Flux Quantum Circuits., , , , , , , and . IEICE Trans. Electron., 97-C (3): 141-148 (2014)A Fast Algorithm for Multiplicative Inversion in GF(2m) Using Normal Basis., , and . IEEE Trans. Computers, 50 (5): 394-398 (2001)On-Line Error-Detectable High-Speed Multiplier Using Redundant Binary Representation and Three-Rail Logic., and . IEEE Trans. Computers, 36 (11): 1310-1317 (1987)