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Constructive Common-Centroid Placement and Routing for Binary-Weighted Capacitor Arrays., , , , , и . DATE, стр. 166-171. IEEE, (2022)The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk)., , , , , , , , , и 3 other автор(ы). ICCAD, стр. 54:1-54:2. IEEE, (2020)ALIGN: Open-Source Analog Layout Automation from the Ground Up., , , , , , , , и . DAC, стр. 77. ACM, (2019)Design Techniques for Zero Steady-State Output Ripple in Digital Low Dropout Regulators., , и . MWSCAS, стр. 1041-1044. IEEE, (2019)A Generalized Methodology for Well Island Generation and Well-tap Insertion in Analog/Mixed-signal Layouts., , , , , , , и . ACM Trans. Design Autom. Electr. Syst., 28 (5): 69:1-69:25 (сентября 2023)Analog Layout Generation using Optimized Primitives., , , , , и . DATE, стр. 1234-1239. IEEE, (2021)A general approach for identifying hierarchical symmetry constraints for analog circuit layout., , , , , и . ICCAD, стр. 120:1-120:8. IEEE, (2020)Learning from Experience: Applying ML to Analog Circuit Design., , , , , , , , , и 2 other автор(ы). ISPD, стр. 55. ACM, (2020)From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning., , , , , , , , , и 5 other автор(ы). ICCAD, стр. 1-9. IEEE, (2021)ALIGN: A System for Automating Analog Layout., , , , , , , , , и 4 other автор(ы). IEEE Des. Test, 38 (2): 8-18 (2021)