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Disambiguation of "Taskin, Baris"

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Simulation based study of on-chip antennas for a reconfigurable hybrid 3D wireless NoC.

, and . SoCC, page 447-452. IEEE, (2010)

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Baris Yanik

Taskin Tuna

Baris Ünver

Caroline Barisch

Baris Serifsoy

 

Other publications of authors with the same name

Towards Design Decisions for Genetic Algorithms in Clock Tree Synthesis., and . IGSC, page 1-6. IEEE, (2018)A charge recovery logic system bus., and . SLIP, page 1-4. IEEE Computer Society, (2017)CROA: Design and Analysis of the Custom Rotary Oscillatory Array., and . IEEE Trans. Very Large Scale Integr. Syst., 19 (10): 1837-1847 (2011)Design Methodology for Voltage-Scaled Clock Distribution Networks., , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (10): 3080-3093 (2016)Low Swing - Low Frequency Rotary Traveling Wave Oscillators., , , and . ISCAS, page 1-5. IEEE, (2019)SnackNoC: Processing in the Communication Layer., , , , and . HPCA, page 461-473. IEEE, (2020)Can You Trust Your Memory Trace? A Comparison of Memory Traces from Binary Instrumentation and Simulation., , , and . VLSID, page 135-140. IEEE Computer Society, (2015)Low Voltage Clock Tree Synthesis with Local Gate Clusters., , , and . ACM Great Lakes Symposium on VLSI, page 99-104. ACM, (2019)A wirelessly powered system with charge recovery logic., , and . ICCD, page 505-510. IEEE Computer Society, (2015)Timing characterization of clock buffers for clock tree synthesis., , and . ICCD, page 230-236. IEEE Computer Society, (2014)