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System-level PVT variation-aware power exploration of on-chip communication architectures.

S. Pasricha, Y. Park, N. Dutt, and F. Kurdahi. ACM Trans. Design Autom. Electr. Syst., 14 (2): 20:1-20:25 (2009)

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Sudeep Kamath

Sudeep Sahadevan

Sudeep Pillai

Other publications of authors with the same name

3D-ProWiz: An Energy-Efficient and Optically-Interfaced 3D DRAM Architecture with Reduced Data Access Overhead.I. Thakkar, and S. Pasricha. IEEE Trans. Multi Scale Comput. Syst., 1 (3): 168-184 (2015)RAPID: Memory-Aware NoC for Latency Optimized GPGPU Architectures.V. Raparti, and S. Pasricha. IEEE Trans. Multi Scale Comput. Syst., 4 (4): 874-887 (2018)Enabling heterogeneous cycle-based and event-driven simulation in a design flow integrated using the SPIRIT consortium specifications.C. Shin, P. Grun, N. Romdhane, C. Lennard, G. Madl, S. Pasricha, N. Dutt, and M. Noll. Des. Autom. Embed. Syst., 11 (2-3): 119-140 (2007)SEDAN: Security-Aware Design of Time-Critical Automotive Networks.V. Kukkala, S. Pasricha, and T. Bradley. IEEE Trans. Veh. Technol., 69 (8): 9017-9030 (2020)A Survey on Optical Phase-Change Memory: The Promise and Challenges.A. Shafiee, S. Pasricha, and M. Nikdast. IEEE Access, (2023)Context-Aware Energy Enhancements for Smart Mobile Devices.B. Donohoo, C. Ohlsen, S. Pasricha, Y. Xiang, and C. Anderson. IEEE Trans. Mob. Comput., 13 (8): 1720-1732 (2014)Power and Thermal-Aware Workload Allocation in Heterogeneous Data Centers.A. Al-Qawasmeh, S. Pasricha, A. Maciejewski, and H. Siegel. IEEE Trans. Computers, 64 (2): 477-491 (2015)HELIX: Design and synthesis of hybrid nanophotonic application-specific network-on-chip architectures.S. Bahirat, and S. Pasricha. ISQED, page 91-98. IEEE, (2014)POSEIDON: A framework for application-specific Network-on-Chip synthesis for heterogeneous chip multiprocessors.S. Kwon, S. Pasricha, and J. Cho. ISQED, page 182-188. IEEE, (2011)Memory-aware circuit overlay NoCs for latency optimized GPGPU architectures.V. Raparti, and S. Pasricha. ISQED, page 63-68. IEEE, (2016)

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Disambiguation of "Pasricha, Sudeep"

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System-level PVT variation-aware power exploration of on-chip communication architectures.

Please choose a person to relate this publication to

Sudeep Kamath

Sudeep Sahadevan

Sudeep Pillai

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Pasricha, Sudeep"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML System-level PVT variation-aware power exploration of on-chip communication architectures.

Please choose a person to relate this publication to

Sudeep Kamath

Sudeep Sahadevan

Sudeep Pillai

Other publications of authors with the same name

Disambiguation

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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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System-level PVT variation-aware power exploration of on-chip communication architectures.