Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Energy Optimization for Large-Scale 3D Manycores in the Dark-Silicon Era., , , , and . IEEE Access, (2019)Public-Key Based Authentication Architecture for IoT Devices Using PUF., , , and . CoRR, (2020)Alternative Architectures Toward Reliable Memristive Crossbar Memories., , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (1): 206-217 (2016)Guest Editorial Memristive-Device-Based Computing., , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (12): 2581-2583 (2018)Defect and Fault Modeling Framework for STT-MRAM Testing., , , , , , , and . IEEE Trans. Emerg. Top. Comput., 9 (2): 707-723 (2021)Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAMs., , , , , and . IEEE Trans. Computers, 71 (9): 2219-2233 (2022)In-Memory Database Query., , , , , and . Adv. Intell. Syst., 2 (12): 2000141 (2020)MNEMOSENE: Tile Architecture and Simulator for Memristor-based Computation-in-memory., , , , , , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (3): 44:1-44:24 (2022)Review of Manufacturing Process Defects and Their Effects on Memristive Devices., , , , , , , and . J. Electron. Test., 37 (4): 427-437 (2021)Evaluation of Single Event Upset Susceptibility of FinFET-based SRAMs with Weak Resistive Defects., , , , , and . J. Electron. Test., 37 (3): 383-394 (2021)