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Disambiguation of "Singh, Abhairaj"

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Reliability aspects of binary vector-matrix-multiplications using ReRAM devices.

, , , , , , , , , and . Neuromorph. Comput. Eng., 2 (3): 34001 (2022)

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Arunoday Singh

Aditi Singh

Raminder Singh

Sikander Singh

Sudhir Singh

 

Other publications of authors with the same name

In-Memory Database Query., , , , , and . Adv. Intell. Syst., 2 (12): 2000141 (2020)A 115.1 TOPS/W, 12.1 TOPS/mm2 Computation-in-Memory using Ring-Oscillator based ADC for Edge AI., , , , , and . AICAS, page 1-5. IEEE, (2023)Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design., , , , , , , , , and 1 other author(s). IEEE Trans. Circuits Syst. II Express Briefs, 71 (3): 1650-1655 (March 2024)Reliability aspects of binary vector-matrix-multiplications using ReRAM devices., , , , , , , , , and . Neuromorph. Comput. Eng., 2 (3): 34001 (2022)System Design for Computation-in-Memory: From Primitive to Complex Functions., , , , , and . VLSI-SoC, page 1-6. IEEE, (2022)Dealing with Non-Idealities in Memristor Based Computation-In-Memory Designs., , , , and . VLSI-SoC, page 1-6. IEEE, (2022)HERMES-Core - A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 57 (4): 1027-1038 (2022)SRIF: Scalable and Reliable Integrate and Fire Circuit ADC for Memristor-Based CIM Architectures., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (5): 1917-1930 (2021)A Voltage-Controlled, Oscillation-Based ADC Design for Computation-in-Memory Architectures Using Emerging ReRAMs., , , , , , , , , and 1 other author(s). ACM J. Emerg. Technol. Comput. Syst., 18 (2): 32:1-32:25 (2022)Energy-efficient In-Memory Address Calculation., , , , , , , and . ACM Trans. Archit. Code Optim., 19 (4): 52:1-52:16 (2022)