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Comparative study of 3D stacked IC and 3D interposer integration: Processing and assembly challenges.

, , , , , , , and . 3DIC, page 1-7. IEEE, (2014)

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Si interposer build-up options and impact on 3D system cost., , , and . 3DIC, page 1-5. IEEE, (2013)High-density and low-leakage novel embedded 3D MIM capacitor on Si interposer., , , , , , , and . 3DIC, page 1-4. IEEE, (2016)Comparative study of 3D stacked IC and 3D interposer integration: Processing and assembly challenges., , , , , , , and . 3DIC, page 1-7. IEEE, (2014)Active-lite interposer for 2.5 & 3D integration., , , , , , , , , and 5 other author(s). VLSIC, page 222-. IEEE, (2015)A calibrated pathfinding model for signal integrity analysis on interposer., , , , , and . CICC, page 1-4. IEEE, (2012)Analysis of microbump induced stress effects in 3D stacked IC technologies., , , , , , , , , and 9 other author(s). 3DIC, page 1-5. IEEE, (2011)3D stacking using ultra thin dies., , , , , , and . 3DIC, page 1-5. IEEE, (2011)Analysis of 3D interconnect performance: Effect of the Si substrate resistivity., , , and . 3DIC, page 1-4. IEEE, (2014)Processing active devices on Si interposer and impact on cost., , , , , , , , , and . 3DIC, page TS11.2.1-TS11.2.4. IEEE, (2015)