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Disambiguation of "Hong, Xianlong"

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3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits.

, , , , , , , and . ICCAD, page 590-597. IEEE Computer Society, (2007)

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Moon-Shin Hong

Jung-soo Hong

Youn-Ho Hong

Seong-Bang Hong

Hong Guo

 

Other publications of authors with the same name

Reliable buffered clock tree routing algorithm with process variation tolerance., , , and . Sci. China Ser. F Inf. Sci., 48 (5): 670-680 (2005)A multi-step standard-cell placement algorithm of optimizing timing and congestion behavior., , , and . Sci. China Ser. F Inf. Sci., 45 (4): 310-320 (2002)Corner block list representation and its application to floorplan optimization., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 51-II (5): 228-233 (2004)Power/Ground Network Optimization Considering Decap Leakage Currents., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (10): 1012-1016 (2006)A Two-Step Heuristic Algorithm for Minimum-Crosstalk Routing Resource Assignment., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (10): 1007-1011 (2006)Partitioning-based decoupling capacitor budgeting via sequence of linear programming., , , and . Integr., 40 (4): 516-524 (2007)An efficient hierarchical timing-driven Steiner tree algorithm for global routing., , , , and . Integr., 35 (2): 69-84 (2003)Floorplanning with abutment constraints based on corner block list., , , , , and . Integr., 31 (1): 65-77 (2001)Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (4): 645-658 (2007)Substrate Topological Routing for High-Density Packages., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (2): 207-216 (2009)