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Disambiguation of "Millán, Alejandro"

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Static Power Consumption in CMOS Gates Using Independent Bodies.

, , , , , , and . PATMOS, volume 4644 of Lecture Notes in Computer Science, page 404-412. Springer, (2007)

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Carlos Millán Herrera

Jaime Augusto Millán Herrera

Mary Mac-Millan

Alejandro Alfaro

In situ hybridization of the feline major satellite DNA FA-SAT in feline fibrosarcoma cell lines and feline fibrosarcoma tissue sections. Uni Gießen, (2009)

Alejandro Rosas

 

Other publications of authors with the same name

Improving the Performance of Static CMOS Gates by Using Independent Bodies., , , , , , and . J. Low Power Electron., 3 (1): 70-77 (2007)Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements., , , , , , and . IES, page 1-7. IEEE, (2006)Internode: Internal Node Logic Computational Model., , , , , and . Annual Simulation Symposium, page 241-248. IEEE Computer Society, (2003)Efficient and Fast Current Curve Estimation of CMOS Digital Circuits at the Logic Level., , , , and . PATMOS, volume 2451 of Lecture Notes in Computer Science, page 400-408. Springer, (2002)Static Power Consumption in CMOS Gates Using Independent Bodies., , , , , , and . PATMOS, volume 4644 of Lecture Notes in Computer Science, page 404-412. Springer, (2007)Signal Sampling Based Transition Modeling for Digital Gates Characterization., , , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 829-837. Springer, (2004)Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits., , , , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 501-510. Springer, (2003)Design of a FFT/IFFT module as an IP core suitable for embedded systems., , , , , , , and . SIES, page 337-340. IEEE, (2007)Characterization of Normal Propagation Delay for Delay Degradation Model (DDM)., , , , and . PATMOS, volume 2451 of Lecture Notes in Computer Science, page 477-486. Springer, (2002)Design and implementation of a suitable core for on-chip long-term verification., , , , , and . SIES, page 234-237. IEEE, (2010)