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A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm., , , , , , , , , и 4 other автор(ы). ISSCC, стр. 326-327. IEEE, (2010)A single-chip MPEG-2 codec based on customizable media embedded processor., , , , , , , , , и 6 other автор(ы). IEEE J. Solid State Circuits, 38 (3): 530-540 (2003)A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling., , , , , , , , , и 13 other автор(ы). IEEE J. Solid State Circuits, 41 (1): 54-62 (2006)An automated runtime power-gating scheme., , , , , , , , и . ICCD, стр. 382-387. IEEE, (2007)A conditional clocking flip-flop for low power H.264/MPEG-4 audio/visual codec LSI., , , , , , , , , и 1 other автор(ы). CICC, стр. 527-530. IEEE, (2005)Repeater insertion method and its application to a 300MHz 128-bit 2-way superscalar microprocessor., , , , , , , , , и 2 other автор(ы). ASP-DAC, стр. 641-646. ACM, (2000)A 110-MHz/1-Mb synchronous TagRAM., , , , , , , , , и 2 other автор(ы). IEEE J. Solid State Circuits, 29 (4): 403-410 (апреля 1994)A 40 nm 222 mW H.264 Full-HD Decoding, 25 Power Domains, 14-Core Application Processor With x512b Stacked DRAM., , , , , , , , , и 8 other автор(ы). IEEE J. Solid State Circuits, 46 (1): 32-41 (2011)Development of low power and high performance application processor (T6G) for multimedia mobile applications., , , , , , и . ASP-DAC, стр. 755-759. IEEE, (2011)A single-chip MPEG-2 codec based on customizable media microprocessor., , , , , , , , , и 5 other автор(ы). CICC, стр. 163-166. IEEE, (2002)