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A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications.

Y. Chen, W. Chan, W. Wu, H. Liao, K. Pan, J. Liaw, T. Chung, Q. Li, C. Lin, M. Chiang, S. Wu, and J. Chang. IEEE J. Solid State Circuits, 50 (1): 170-177 (2015)

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Yang Wu

Xiang-Yang Wu

Shimeles Damene Shiene

Yang Yang

Other publications of authors with the same name

A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications.Y. Chen, W. Chan, W. Wu, H. Liao, K. Pan, J. Liaw, T. Chung, Q. Li, C. Lin, M. Chiang and 2 other author(s). IEEE J. Solid State Circuits, 50 (1): 170-177 (2015)17.2 A 64kb 16nm asynchronous disturb current free 2-port SRAM with PMOS pass-gates for FinFET technologies.H. Fujiwara, L. Wang, Y. Chen, K. Lin, D. Sun, S. Wu, J. Liaw, C. Lin, M. Chiang, H. Liao and 2 other author(s). ISSCC, page 1-3. IEEE, (2015)12.1 A 7nm 256Mb SRAM in high-k metal-gate FinFET technology with write-assist circuitry for low-VMIN applications.J. Chang, Y. Chen, W. Chan, S. Singh, H. Cheng, H. Fujiwara, J. Lin, K. Lin, J. Hung, R. Lee and 6 other author(s). ISSCC, page 206-207. IEEE, (2017)Technology entrepreneurial styles: a comparison of UMC and TSMC.T. Liu, Y. Chu, S. Hung, and S. Wu. Int. J. Technol. Manag., 29 (1/2): 92-115 (2005)13.5 A 16nm 128Mb SRAM in high-κ metal-gate FinFET technology with write-assist circuitry for low-VMIN applications.Y. Chen, W. Chan, W. Wu, H. Liao, K. Pan, J. Liaw, T. Chung, Q. Li, G. Chang, C. Lin and 4 other author(s). ISSCC, page 238-239. IEEE, (2014)A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN Applications.J. Chang, Y. Chen, G. Chan, K. Lin, P. Wang, Y. Lin, S. Chen, P. Lin, C. Wu, C. Lin and 8 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC Applications.Y. Osada, T. Nakazato, K. Nii, J. Liaw, S. Wu, Q. Li, H. Fujiwara, H. Liao, and T. Chang. VLSI Technology and Circuits, page 1-2. IEEE, (2023)

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Disambiguation of "Wu, Shien-Yang"

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A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications.

Please choose a person to relate this publication to

Yang Wu

Xiang-Yang Wu

Shimeles Damene Shiene

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Wu, Shien-Yang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications.

Please choose a person to relate this publication to

Yang Wu

Xiang-Yang Wu

Shimeles Damene Shiene

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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A 16 nm 128 Mb SRAM in High-κ Metal-Gate FinFET Technology With Write-Assist Circuitry for Low-VMIN Applications.