%0 Journal Article %1 journals/jssc/MorishitaHGNISD07 %A Morishita, Fukashi %A Hayashi, Isamu %A Gyohten, Takayuki %A Noda, Hideyuki %A Ipposhi, Takashi %A Shimano, Hiroki %A Dosaka, Katsumi %A Arimoto, Kazutami %D 2007 %J IEEE J. Solid State Circuits %K dblp %N 4 %P 853-861 %T A Configurable Enhanced TTRAM Macro for System-Level Power Management Unified Memory. %U http://dblp.uni-trier.de/db/journals/jssc/jssc42.html#MorishitaHGNISD07 %V 42

@article{journals/jssc/MorishitaHGNISD07, added-at = {2023-06-26T00:00:00.000+0200}, author = {Morishita, Fukashi and Hayashi, Isamu and Gyohten, Takayuki and Noda, Hideyuki and Ipposhi, Takashi and Shimano, Hiroki and Dosaka, Katsumi and Arimoto, Kazutami}, biburl = {https://www.bibsonomy.org/bibtex/2f3c8b8a7e7838584eb07dc5f5cfc3d7a/dblp}, ee = {https://doi.org/10.1109/JSSC.2007.891677}, interhash = {03c799865ef8064ea9b7092b72a795d8}, intrahash = {f3c8b8a7e7838584eb07dc5f5cfc3d7a}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 4, pages = {853-861}, timestamp = {2024-04-08T10:42:32.000+0200}, title = {A Configurable Enhanced TTRAM Macro for System-Level Power Management Unified Memory.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc42.html#MorishitaHGNISD07}, volume = 42, year = 2007 }