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Disambiguation of "Jun, Minje"

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Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches.

, , and . ASP-DAC, page 583-588. IEEE, (2008)

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Georg Minje

Jun Jun Lu

Jun Li

Jun Yang

Jun Yang

 

Other publications of authors with the same name

Latency-Aware Bus Arbitration for Real-Time Embedded Systems., , , and . IEICE Trans. Inf. Syst., 90-D (3): 676-679 (2007)Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches., , and . ASP-DAC, page 583-588. IEEE, (2008)$C\!\!-\!\!Lock$ : Energy Efficient Synchronization for Embedded Multicore Systems., , , , , , and . IEEE Trans. Computers, 63 (8): 1962-1974 (2014)Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems., , , , and . ASP-DAC, page 159-164. IEEE Computer Society, (2007)Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network., , and . DATE, page 1390-1395. IEEE Computer Society, (2010)Partial Connection-Aware Topology Synthesis for On-Chip Cascaded Crossbar Network., , and . IEEE Trans. Computers, 61 (1): 73-86 (2012)Asymmetric DRAM synthesis for heterogeneous chip multiprocessors in 3D-stacked architecture., , and . ICCAD, page 73-80. ACM, (2012)Topology Synthesis of Cascaded Crossbar Switches., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (6): 926-930 (2009)Exploiting Implementation Diversity and Partial Connection of Routers in Application-Specific Network-on-Chip Topology Synthesis., , and . IEEE Trans. Computers, 63 (6): 1434-1445 (2014)Jitter-Conscious Bus Arbitration Scheme for Real-Time Systems., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 92-A (2): 643-647 (2009)