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Disambiguation of "Kousai, Shouhei"

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Time-domain neural network: A 48.5 TSOp/s/W neuromorphic chip optimized for deep learning and CMOS technology.

, , , and . A-SSCC, page 25-28. IEEE, (2016)

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A 2.4-GHz Temperature-Compensated CMOS LC-VCO for Low Frequency Drift Low-Power Direct-Modulation GFSK Transmitters., , , , , , , , , and 2 other author(s). IEICE Trans. Electron., 88-C (4): 490-495 (2005)An Octave-Range, Watt-Level, Fully-Integrated CMOS Switching Power Mixer Array for Linearization and Back-Off-Efficiency Improvement., and . IEEE J. Solid State Circuits, 44 (12): 3376-3392 (2009)A 2.9mW, +/- 85ppm accuracy reference clock generator based on RC oscillator with on-chip temperature calibration., , , and . VLSIC, page 1-2. IEEE, (2014)A new wave of CMOS power amplifier innovations: Fusing digital and analog techniques with large signal RF operations., , , , and . CICC, page 1-8. IEEE, (2014)A-104 dBc/Hz In-Band Phase Noise 3 GHz All Digital PLL with Phase Interpolation Based Hierarchical Time to Digital Converter., , , , , and . IEICE Trans. Electron., 95-C (6): 1008-1016 (2012)A Neuromorphic Chip Optimized for Deep Learning and CMOS Technology With Time-Domain Analog and Digital Mixed-Signal Processing., , , and . IEEE J. Solid State Circuits, 52 (10): 2679-2689 (2017)A 19.7 MHz, Fifth-Order Active-RCChebyshev LPF for Draft IEEE802.11n With Automatic Quality-Factor Tuning Scheme., , , and . IEEE J. Solid State Circuits, 42 (11): 2326-2337 (2007)19.3 66.3KIOPS-random-read 690MB/s-sequential-read universal Flash storage device controller with unified memory extension., , , , , , , , , and 4 other author(s). ISSCC, page 330-331. IEEE, (2014)F5: Advanced RF CMOS transmitter techniques., , , , , and . ISSCC, page 1-2. IEEE, (2015)A 187.5µVrms-read-noise 51mW 1.4Mpixel CMOS image sensor with PMOSCAP column CDS and 10b self-differential offset-cancelled pipeline SAR-ADC., , , , , , , , , and 2 other author(s). ISSCC, page 494-495. IEEE, (2013)