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Disambiguation of "Yu, Dunshan"

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Employing the mixed FBB/RBB in the design of FinFET logic gates.

, , , , , , and . ASICON, page 1-4. IEEE, (2015)

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Yu-Ting Yu

Yu-Yu Su

Sze-Man Yu

Metal complexes with enolatoimine ligands for controlled olefin polymerizations. Uni Konstanz, (2009)

Zhejun Yu

Hangxing Yu

 

Other publications of authors with the same name

A CMOS Differential Difference Amplifier with Reduced Nonlinearity Error of Interpolation for Interpolating ADCs., , and . APCCAS, page 9-12. IEEE, (2006)A Dynamic-Adjusting Threshold-Voltage Scheme for FinFETs low power designs., , , , , , , and . ISCAS, page 129-132. IEEE, (2013)Design of Low-Power High-Performance FinFET Standard Cells., , , , , and . CSSP, 37 (5): 1789-1806 (2018)Designing a 3D Graphics Processor for Mobile Applications., , and . ASICON, page 1-4. IEEE, (2019)Balance Differential Coherent Bit Synchronization Algorithm for GNSS Receiver., , , and . IEICE Trans. Commun., 98-B (6): 1133-1140 (2015)A Novel Polymorphic Gate Based Circuit Fingerprinting Technique., , , , , , and . ACM Great Lakes Symposium on VLSI, page 141-146. ACM, (2018)Employing the mixed FBB/RBB in the design of FinFET logic gates., , , , , , and . ASICON, page 1-4. IEEE, (2015)A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications., , , , , , and . ASICON, page 1-4. IEEE, (2015)FPGA Implementation of Quantized Convolutional Neural Networks., , , , , and . ICCT, page 1605-1610. IEEE, (2019)High-Performance Noninvasive Side-Channel Attack Resistant ECC Coprocessor for GF(2m )., , , , , and . IEEE Trans. Ind. Electron., 64 (1): 727-738 (2017)