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The synthesis method of logic circuits based on the iMemComp gates., , , , , and . Integr., (2020)Towards Lossless ANN-SNN Conversion under Ultra-Low Latency with Dual-Phase Optimization., , , , , and . CoRR, (2022)The Synthesis Method of Logic Circuits Based on the NMOS-Like RRAM Gates., , , and . IEEE Access, (2021)ESSA: Design of a Programmable Efficient Sparse Spiking Neural Network Accelerator., , , , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 30 (11): 1631-1641 (2022)Ultra-low power dissipation of improved complementary pass-transistor adiabatic logic circuits based on FinFETs., , , , , , , and . Sci. China Inf. Sci., 57 (4): 1-13 (2014)Evaluation of Dynamic-Adjusting Threshold-Voltage Scheme for Low-Power FinFET Circuits., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (10): 1922-1929 (2018)High-Performance Noninvasive Side-Channel Attack Resistant ECC Coprocessor for GF(2m )., , , , , and . IEEE Trans. Ind. Electron., 64 (1): 727-738 (2017)A design of high performance full adder with memristors., , and . ASICON, page 746-479. IEEE, (2017)Employing the mixed FBB/RBB in the design of FinFET logic gates., , , , , , and . ASICON, page 1-4. IEEE, (2015)A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications., , , , , , and . ASICON, page 1-4. IEEE, (2015)