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The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks.

J. Dutertre, V. Beroulle, P. Candelier, L. Faber, M. Flottes, P. Gendrier, D. Hély, R. Leveugle, P. Maistri, G. Natale, A. Papadimitriou, and B. Rouzeyre. IOLTS, page 214-219. IEEE, (2018)

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Philippe Destouches

Philippe Staib

Philippe Bopp

Philippe Moisan

Philippe Kersting

Other publications of authors with the same name

Extended TDDB power-law validation for high-voltage applications such as OTP memories in High-k CMOS 28nm FDSOI technology.A. Benoist, S. Denorme, X. Federspiel, B. Allard, and P. Candelier. IRPS, page 3. IEEE, (2015)Laser-induced fault effects in security-dedicated circuits.R. Leveugle, P. Maistri, P. Vanhauwaert, F. Lu, G. Natale, M. Flottes, B. Rouzeyre, A. Papadimitriou, D. Hély, V. Beroulle and 9 other author(s). VLSI-SoC, page 1-6. IEEE, (2014)The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks.J. Dutertre, V. Beroulle, P. Candelier, L. Faber, M. Flottes, P. Gendrier, D. Hély, R. Leveugle, P. Maistri, G. Natale and 2 other author(s). IOLTS, page 214-219. IEEE, (2018)Increasing the security level of analog IPs by using a dedicated vulnerability analysis methodology.N. Beringuier-Boher, D. Hély, V. Beroulle, J. Damiens, and P. Candelier. ISQED, page 531-537. IEEE, (2013)Laser attacks on integrated circuits: From CMOS to FD-SOI.J. Dutertre, S. Castro, A. Sarafianos, N. Boher, B. Rouzeyre, M. Lisart, J. Damiens, P. Candelier, M. Flottes, and G. Natale. DTIS, page 1-6. IEEE, (2014)Laser Fault Injection at the CMOS 28 nm Technology Node: an Analysis of the Fault Model.J. Dutertre, V. Beroulle, P. Candelier, S. Castro, L. Faber, M. Flottes, P. Gendrier, D. Hély, R. Leveugle, P. Maistri and 3 other author(s). FDTC, page 1-6. IEEE Computer Society, (2018)Laser-Induced Fault Effects in Security-Dedicated Circuits.V. Beroulle, P. Candelier, S. Castro, G. Natale, J. Dutertre, M. Flottes, D. Hély, G. Hubert, R. Leveugle, F. Lu and 5 other author(s). VLSI-SoC (Selected Papers), volume 464 of IFIP Advances in Information and Communication Technology, page 220-240. Springer, (2014)Review of fuse and antifuse solutions for advanced standard CMOS technologies.E. Ebrard, B. Allard, P. Candelier, and P. Waltz. Microelectron. J., 40 (12): 1755-1765 (2009)Clock generator behavioral modeling for supply voltage glitch attack effects analysis.N. Beringuier-Boher, V. Beroulle, D. Hély, J. Damiens, and P. Candelier. Microprocess. Microsystems, (2016)Benefit of Al2O3/HfO2 bilayer for BEOL RRAM integration through 16kb memory cut characterization.M. Azzaz, A. Benoist, E. Vianello, D. Garbin, E. Jalaguier, C. Cagli, C. Charpin, S. Bernasconi, S. Jeannot, T. Dewolf and 6 other author(s). ESSDERC, page 266-269. IEEE, (2015)

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Disambiguation of "Candelier, Philippe"

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The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks.

Please choose a person to relate this publication to

Philippe Destouches

Philippe Staib

Philippe Bopp

Philippe Moisan

Philippe Kersting

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Candelier, Philippe"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks.

Please choose a person to relate this publication to

Philippe Destouches

Philippe Staib

Philippe Bopp

Philippe Moisan

Philippe Kersting

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks.