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Disambiguation of "Chang, Meng-Fan"

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7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications.

, , , , , , , , , , , , and . ISSCC, page 134-135. IEEE, (2016)

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Fan Chen Meng

Meng-Chang Liu

Meng Meng

Meng Meng Liang

Meng Zhang

Methods and implementations of road-network matching. TU München, (2009)
 

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17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time., , , , , , , , , and 1 other author(s). ISSCC, page 1-3. IEEE, (2015)A 260mV L-shaped 7T SRAM with bit-line (BL) Swing expansion schemes based on boosted BL, asymmetric-VTH read-port, and offset cell VDD biasing techniques., , , , , , , , , and 2 other author(s). VLSIC, page 112-113. IEEE, (2012)A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors., , , , , , , , , and 7 other author(s). ISSCC, page 494-496. IEEE, (2018)A Nonvolatile AI-Edge Processor With SLC-MLC Hybrid ReRAM Compute-in-Memory Macro Using Current-Voltage-Hybrid Readout Scheme., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 59 (1): 116-127 (January 2024)A Dual-Split 6T SRAM-Based Computing-in-Memory Unit-Macro With Fully Parallel Product-Sum Operation for Binarized DNN Edge Processors., , , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (11): 4172-4185 (2019)A Fully Integrated Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated Pneumonia., , , , , , , , , and 10 other author(s). IEEE Trans. Biomed. Circuits Syst., 8 (6): 765-778 (2014)Resistive Memory-Based In-Memory Computing: From Device and Large-Scale Integration System Perspectives., , , , , , and . Adv. Intell. Syst., 1 (7): 1900068 (2019)Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices., , , , , , , , , and 3 other author(s). VLSI Circuits, page 166-. IEEE, (2019)A 0.8 V Intelligent Vision Sensor With Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for Image Classification., , , , , , , and . IEEE J. Solid State Circuits, 58 (11): 3266-3274 (November 2023)A Large Sigma V TH /VDD Tolerant Zigzag 8T SRAM With Area-Efficient Decoupled Differential Sensing and Fast Write-Back Scheme., , , , , , , , , and . IEEE J. Solid State Circuits, 46 (4): 815-827 (2011)