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Design and implementation of a second order PLL based frequency synthesizer for implantable medical devices., and . Integr., (2022)Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS., , , and . Microelectron. J., (2020)Design of CMOS Device Process Sensor in 28 nm FD-SOI with 2 % of Frequency Spread., , and . ICECS, page 1-6. IEEE, (2021)Design of HV-CMOS Detectors in BCD Technology with Noise and Crosstalk Measurements., , , , , and . ICECS, page 398-401. IEEE, (2019)A Thomas Algorithm-Based Generic Approach for Modeling of Power Supply Induced Jitter in CMOS Buffers., , , and . IEEE Access, (2019)Digitally Assisted Secondary Switch-and-Compare Technique for a SAR ADC., , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (7): 2317-2321 (2021)11 GHz UGBW Op-amp with feed-forward compensation technique., and . ISCAS, page 17-20. IEEE, (2011)A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS., , and . ISCAS, page 1-5. IEEE, (2019)Design of a Third Order Butterworth Gm-C Filter for EEG Signal Detection Application., , , , and . MIXDES, page 361-365. IEEE, (2018)Reduced switching mode for SAR ADCs: analysis and design of SAR A-to-D algorithm with periodic standby mode circuit components., , and . IET Circuits Devices Syst., 14 (5): 686-694 (2020)