Author of the publication

A Testable/Fault Tolerant FFT Processor Design.

, , and . Asian Test Symposium, page 429-. IEEE Computer Society, (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

General Modular Multiplication by Block Multiplication and Table Lookup., and . ISCAS, page 295-298. IEEE, (1994)Processor-programmable memory BIST for bus-connected embedded memories., and . ASP-DAC, page 325-330. ACM, (2001)An adaptive code rate EDAC scheme for random access memory., and . DATE, page 735-740. IEEE Computer Society, (2010)Low-Cost Modular Totally Self-Checking Checker Design for m-out-of-n Code., and . IEEE Trans. Computers, 48 (8): 815-826 (1999)Cellular-array modular multiplier for fast RSA public-key cryptosystem based on modified Booth's algorithm., and . IEEE Trans. Very Large Scale Integr. Syst., 11 (3): 474-484 (2003)An improved Montgomery's algorithm for high-speed RSA public-key cryptosystem., , , and . IEEE Trans. Very Large Scale Integr. Syst., 7 (2): 280-284 (1999)Write Current Self-Configuration Scheme for MRAM Yield Improvement., , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (7): 1260-1270 (2013)Unified VLSI systolic array design for LZ data compression., and . IEEE Trans. Very Large Scale Integr. Syst., 9 (4): 489-499 (2001)SRAM delay fault modeling and test algorithm development., , , and . ASP-DAC, page 104-109. IEEE Computer Society, (2004)A self-testing and calibration method for embedded successive approximation register ADC., , , , , , , and . ASP-DAC, page 713-718. IEEE, (2011)