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A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation.

D. Bull, S. Das, K. Shivashankar, G. Dasika, K. Flautner, and D. Blaauw. IEEE J. Solid State Circuits, 46 (1): 18-31 (2011)

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Ganesh Suyal

Ganesh Pathare

Ganesh Venkataraman

Ganesh Pathare

Venkateswaran Ganesh

Other publications of authors with the same name

A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation.S. Das, G. Dasika, K. Shivashankar, and D. Bull. CICC, page 1-4. IEEE, (2013)A Deep Dive Into Understanding The Random Walk-Based Temporal Graph Learning.N. Talati, D. Jin, H. Ye, A. Brahmakshatriya, G. Dasika, S. Amarasinghe, T. Mudge, D. Koutra, and R. Dreslinski. IISWC, page 87-100. IEEE, (2021)Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache.R. Ravindran, P. Nagarkar, G. Dasika, E. Marsman, R. Senger, S. Mahlke, and R. Brown. CGO, page 179-190. IEEE Computer Society, (2005)PEPSC: A Power-Efficient Processor for Scientific Computing.G. Dasika, A. Sethia, T. Mudge, and S. Mahlke. PACT, page 101-110. IEEE Computer Society, (2011)Power-efficient medical image processing using PUMA.G. Dasika, K. Fan, and S. Mahlke. SASP, page 29-34. IEEE Computer Society, (2009)A Customized Processor for Energy Efficient Scientific Computing.A. Sethia, G. Dasika, T. Mudge, and S. Mahlke. IEEE Trans. Computers, 61 (12): 1711-1723 (2012)DVFS in loop accelerators using BLADES.G. Dasika, S. Das, K. Fan, S. Mahlke, and D. Bull. DAC, page 894-897. ACM, (2008)Bridging the computation gap between programmable processors and hardwired accelerators.K. Fan, M. Kudlur, G. Dasika, and S. Mahlke. HPCA, page 313-322. IEEE Computer Society, (2009)CoreGenesis: erasing core boundaries for robust and configurable performance.S. Gupta, S. Feng, A. Ansari, G. Dasika, and S. Mahlke. PACT, page 571-572. ACM, (2010)Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor.R. Ravindran, R. Senger, E. Marsman, G. Dasika, M. Guthaus, S. Mahlke, and R. Brown. IEEE Trans. Computers, 54 (8): 998-1012 (2005)

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Disambiguation of "Dasika, Ganesh S."

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A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation.

Please choose a person to relate this publication to

Ganesh Suyal

Ganesh Pathare

Ganesh Venkataraman

Ganesh Pathare

Venkateswaran Ganesh

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Dasika, Ganesh S."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation.

Please choose a person to relate this publication to

Ganesh Suyal

Ganesh Pathare

Ganesh Venkataraman

Ganesh Pathare

Venkateswaran Ganesh

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation.