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Disambiguation of "Liu, Ruhui"

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STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse.

, , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 57 (8): 2560-2573 (2022)

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Liu Liu

Liu Liu

Liu Liu

Keetsin Liu

Ching Liu

 

Other publications of authors with the same name

A Two-way SRAM Array based Accelerator for Deep Neural Network On-chip Training., , , , , , , , , and . DAC, page 1-6. IEEE, (2020)14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse., , , , , , , , , and 1 other author(s). ISSCC, page 234-236. IEEE, (2020)A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 55 (10): 2790-2801 (2020)STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 57 (8): 2560-2573 (2022)Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips., , , , , , , , , and 15 other author(s). IEEE J. Solid State Circuits, 57 (2): 609-624 (2022)A 6.54-to-26.03 TOPS/W Computing-In-Memory RNN Processor using Input Similarity Optimization and Attention-based Context-breaking with Output Speculation., , , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2021)15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips., , , , , , , , , and 13 other author(s). ISSCC, page 240-242. IEEE, (2020)Constraint-based clustering by fast search and find of density peaks., , , , and . Neurocomputing, (2019)A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips., , , , , , , , , and 15 other author(s). IEEE J. Solid State Circuits, 58 (3): 877-892 (March 2023)A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro With 8-b MAC Operation for Edge AI Chips., , , , , , , , , and 11 other author(s). IEEE J. Solid State Circuits, 56 (9): 2817-2831 (2021)