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Disambiguation of "Zhang, Zhixiao"

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A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors.

, , , , , , , , , , , , , , , , , and . IEEE J. Solid State Circuits, 55 (10): 2790-2801 (2020)

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Zhang Zhang

Meng Zhang

Methods and implementations of road-network matching. TU München, (2009)

Yue Zhang

Yan Zhang

Xianghong Zhang

 

Other publications of authors with the same name

A 55nm 1-to-8 bit Configurable 6T SRAM based Computing-in-Memory Unit-Macro for CNN-based AI Edge Processors., , , , , , , , , and 6 other author(s). A-SSCC, page 217-218. IEEE, (2019)15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips., , , , , , , , , and 17 other author(s). ISSCC, page 246-248. IEEE, (2020)A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 55 (10): 2790-2801 (2020)STICKER-IM: A 65 nm Computing-in-Memory NN Processor Using Block-Wise Sparsity Optimization and Inter/Intra-Macro Data Reuse., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 57 (8): 2560-2573 (2022)Circuit Design Challenges in Computing-in-Memory for AI Edge Devices., , , , , , , , , and 1 other author(s). ASICON, page 1-4. IEEE, (2019)Recent Advances in Compute-in-Memory Support for SRAM Using Monolithic 3-D Integration., , , , and . IEEE Micro, 39 (6): 28-37 (2019)15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips., , , , , , , , , and 13 other author(s). ISSCC, page 240-242. IEEE, (2020)A 6.54-to-26.03 TOPS/W Computing-In-Memory RNN Processor using Input Similarity Optimization and Attention-based Context-breaking with Output Speculation., , , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2021)14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data Reuse., , , , , , , , , and 1 other author(s). ISSCC, page 234-236. IEEE, (2020)A Framework for Incremental Deep Web Crawler Based on URL Classification., , , and . WISM (2), volume 6988 of Lecture Notes in Computer Science, page 302-310. Springer, (2011)