( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Inversion optimization in Majority-Inverter Graphs.

, , , , , , , и . NANOARCH, стр. 15-20. ACM, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Pierre-Emmanuel Arduin

Pierre-Emmanuel Leni

Pierre Emmanuel Ilouga

Pierre-Emmanuel Cornilleau

Emmanuel Umana

 

Другие публикации лиц с тем же именем

A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors., , , и . VLSI-SoC (Selected Papers), том 586 из IFIP Advances in Information and Communication Technology, стр. 307-322. Springer, (2019)GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment., , , , , , и . MICRO, стр. 334-346. ACM, (2019)Differential Power Analysis Mitigation Technique Using Three-Independent-Gate Field Effect Transistors., и . VLSI-SoC, стр. 107-112. IEEE, (2018)A high-performance low-power near-Vt RRAM-based FPGA., , и . FPT, стр. 207-214. IEEE, (2014)Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 31 (8): 1204-1213 (августа 2023)Extending Boolean Methods for Scalable Logic Synthesis., , , , , , и . IEEE Access, (2020)Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking., , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (5): 2028-2036 (мая 2023)Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design., , , , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (11): 3155-3164 (2014)Post-P&R Performance and Power Analysis for RRAM-Based FPGAs., , , и . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (3): 639-650 (2018)Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only)., , , , и . FPGA, стр. 262. ACM, (2015)