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Low-Cost Fault Simulation: Why, When and How.. ITC, page 795. IEEE Computer Society, (1985)Test Generation In Lamp2: System Overview., , , and . ITC, page 45-48. IEEE Computer Society, (1985)Satisfiability on reconfigurable hardware., and . FPL, volume 1304 of Lecture Notes in Computer Science, page 448-456. Springer, (1997)Low-cost sequential ATPG with clock-control DFT., , and . DAC, page 243-248. ACM, (2002)A SAT Solver Using Reconfigurable Hardware and Virtual Logic., and . J. Autom. Reason., 24 (1/2): 5-36 (2000)A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware., and . FCCM, page 306-307. IEEE Computer Society, (1999)Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration., , , and . FCCM, page 165-174. IEEE Computer Society, (2000)Increasing testability by clock transformation (getting rid of those darn states)., , and . VTS, page 224-230. IEEE Computer Society, (1996)Keynote address tribute to Professor Mel Breuer: Contributions to CAD and Test., , , and . VTS, page 1. IEEE Computer Society, (2017)Sequentially Untestable Faults Identified Without Search ("Simple Implications Beat Exhaustive Search!")., and . ITC, page 259-266. IEEE Computer Society, (1994)