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Disambiguation of "Chaudhuri, Parimal Pal"

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CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder.

, , , , and . ASYNC, page 62-72. IEEE Computer Society, (2000)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Parimal Adhikary

Parimal Sen

Nondini Chaudhuri

Mitochondriale Bildung von reaktiven Sauerstoffspezies in Abhängigkeit vom Sauerstoffpartialdruck und der mitochondrialen Aktivität. Uni Heidelberg, (2010)

Indronil Chaudhuri

Manis Chaudhuri

 

Other publications of authors with the same name

Selecting test methodologies for PLAs and random logic modules in VLSI circuits - an expert systems approach., , and . Integr., 7 (3): 267-281 (1989)Cellular Automata Based Authentication (CAA)., , and . ACRI, volume 2493 of Lecture Notes in Computer Science, page 259-269. Springer, (2002)Evolving Cellular Automata as Pattern Classifier., , , , and . ACRI, volume 2493 of Lecture Notes in Computer Science, page 56-68. Springer, (2002)Design of a 'T' Fault Repairable Multiprocessor System., , and . ICDCS, page 227-233. IEEE Computer Society, (1985)Synthesis of programmable multi-input current-mode linear analog circuits., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 51-I (8): 1440-1456 (2004)Cellular-Automata-Array-Based Diagnosis of Board Level Faults., , , and . IEEE Trans. Computers, 47 (8): 817-828 (1998)KGPMIN: an efficient multilevel multioutput AND-OR-XOR minimizer., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (3): 257-265 (1997)Analysis of coronavirus envelope protein with cellular automata model., and . Int. J. Parallel Emergent Distributed Syst., 37 (6): 623-648 (2022)Theory and Applications of Cellular Automata for VLSI Design and Testing., , , and . VLSI Design, page 4. IEEE Computer Society, (2000)Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture., , and . VLSI Design, page 57-62. IEEE Computer Society, (1995)