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MemNet: Memory-Efficiency Guided Neural Architecture Search with Augment-Trim learning., , , , and . CoRR, (2019)A Metastability Risk Prediction and Mitigation Technique for Clock-Domain Crossing With Single-Stage Synchronizer in Near-Threshold-Voltage Multivoltage/ Frequency-Domain Network-on-Chip., , , , , , and . IEEE J. Solid State Circuits, 59 (2): 616-625 (February 2024)0.5-1-V, 90-400-mA, Modular, Distributed, 3 × 3 Digital LDOs Based on Event-Driven Control and Domino Sampling and Regulation., , , , , and . IEEE J. Solid State Circuits, 56 (9): 2781-2794 (2021)DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm., , , , , , and . IEEE J. Solid State Circuits, 59 (3): 960-971 (March 2024)A 0.5V 2.2pW 2-transistor voltage reference., , , and . CICC, page 577-580. IEEE, (2009)High-Capacity Fingerprint Recognition System based on a Dynamic Memory-Capacity Estimation Technique., , , and . BioCAS, page 1-4. IEEE, (2018)Register file circuits and post-deployment framework to monitor aging effects in field., , and . ESSCIRC, page 425-428. IEEE, (2016)Temporarily Fine-Grained Sleep Technique for Near- and Subthreshold Parallel Architectures., and . IEEE Trans. Very Large Scale Integr. Syst., 25 (1): 189-197 (2017)A 0.35V 1.3pJ/cycle 20MHz 8-bit 8-tap FIR core based on wide-pulsed-latch pipelines., , , , and . A-SSCC, page 129-132. IEEE, (2016)8.2 Fully integrated low-drop-out regulator based on event-driven PI control., and . ISSCC, page 148-149. IEEE, (2016)