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A comparative analysis of tunneling FET circuit switching characteristics and SRAM stability and performance., , , , , , и . ESSDERC, стр. 157-160. IEEE, (2012)Ultra-low voltage mixed TFET-MOSFET 8T SRAM cell., , , , и . ISLPED, стр. 255-258. ACM, (2014)Device Designs and Analog Performance Analysis for Negative-Capacitance Vertical-Tunnel FET., и . ISQED, стр. 241-246. IEEE, (2019)Impacts of NBTI and PBTI on ultra-thin-body GeOI 6T SRAM cells., , , и . ISCAS, стр. 601-604. IEEE, (2015)Evaluation of TFET and FinFET devices and 32-Bit CLA circuits considering work function variation and line-edge roughness., , , , , и . ISCAS, стр. 2325-2328. IEEE, (2015)Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices., , , , и . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (12): 3339-3347 (2014)Monolithic 3D SRAM Cell with Stacked Two-Dimensional Materials Based FETs at 2nm Node., , , , и . ISCAS, стр. 1-5. IEEE, (2021)Evaluation of Read- and Write-Assist circuits for GeOI FinFET 6T SRAM cells., , , и . ISCAS, стр. 1122-1125. IEEE, (2014)Stability and performance optimization of InGaAs-OI and GeOI hetero-channel SRAM cells., , , и . ESSDERC, стр. 77-80. IEEE, (2012)Improved Read Stability and Writability of Negative Capacitance FinFET SRAM Cell for Subthreshold Operation., и . ISCAS, стр. 1-5. IEEE, (2019)