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Frequency-Hopped Quadrature Frequency Synthesizer in 0.13-mum Technology., , and . IEEE J. Solid State Circuits, 46 (9): 2021-2032 (2011)Design of Low Power Integrated Radios for Emerging Standards, and . Springer, (2020)A novel noise optimization design technique for radio frequency low noise amplifiers., , and . ISCAS (1), page 209-212. IEEE, (2003)Analysis and gain design of an integrated quadrature mixer with improved noise and image rejection., and . ISCAS (4), page 786-789. IEEE, (2001)Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%)., and . ISCAS, page 1975-1978. IEEE, (2010)A throughput-agnostic 11.9-13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS., , , , , , and . VLSIC, page 150-. IEEE, (2015)System-level design for test of fully differential analog circuits., , and . IEEE J. Solid State Circuits, 31 (10): 1526-1534 (1996)A 455-Mb/s MR preamplifier design in a 0.8-μm CMOS process.. IEEE J. Solid State Circuits, 36 (6): 862-872 (2001)A 2.4GHz IEEE 802.15.6 Compliant 1.52nJ/bit TX & 1.32nJ/bit RX Multiband Transceiver for Low Power Standards., and . ICECS, page 821-824. IEEE, (2018)A CMOS high efficiency +22 dBm linear power amplifier., and . CICC, page 557-560. IEEE, (2004)