( en | de | ru )

 

Disambiguation of "Pavlidis, Vasilis F."

Author of the publication

copydeleteadd this publication to your clipboard
3.5-D integration: A case study.

, , , , and . ISCAS, page 2087-2090. IEEE, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Dimitrios Pavlidis

Vasilis Ntziachristos

Christos Pavlidis

Vasilis Friderikos

Nikolaus Pavlidis

 

Other publications of authors with the same name

Ultra-low swing CMOS transceiver for 2.5-D integrated systems., and . ISQED, page 262-267. IEEE, (2018)Mismatch Compensation Technique for Inverter-Based CMOS Circuits., and . ISCAS, page 1-5. IEEE, (2018)Fabrication Cost Analysis for Contactless 3-D ICs., , and . IEEE Trans. Circuits Syst. II Express Briefs, 66-II (5): 758-762 (2019)An Enhanced Design Methodology for Resonant Clock Trees., , , and . J. Low Power Electron., 9 (2): 198-206 (2013)Voltage scaling for 3-D ICs: When, how, and how much?, and . Microelectron. J., (2017)Monolithic 3D Integrated Circuits: Recent Trends and Future Prospects., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (3): 837-843 (2021)TSV-based hairpin bandpass filter for 6G mobile communication applications., , , , , and . IEICE Electron. Express, 18 (15): 20210247 (2021)Temperature-Aware Optimization of Monolithic 3D Deep Neural Network Accelerators., , , , and . ASP-DAC, page 709-714. ACM, (2021)Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits., , and . PATMOS, volume 6951 of Lecture Notes in Computer Science, page 267-277. Springer, (2011)Mitigating EM Side-Channel Attacks with Dynamic Delay Insertion and Data Bus Inversion., , and . ISCAS, page 1724-1728. IEEE, (2022)