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Disambiguation of "Gaillardon, Pierre-Emmanuel"

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3.5-D integration: A case study.

, , , , and . ISCAS, page 2087-2090. IEEE, (2013)

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Pierre-Emmanuel Arduin

Pierre-Emmanuel Leni

Pierre Emmanuel Ilouga

Pierre-Emmanuel Cornilleau

Emmanuel Umana

 

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GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment., , , , , , and . MICRO, page 334-346. ACM, (2019)Differential Power Analysis Mitigation Technique Using Three-Independent-Gate Field Effect Transistors., and . VLSI-SoC, page 107-112. IEEE, (2018)A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors., , , and . VLSI-SoC (Selected Papers), volume 586 of IFIP Advances in Information and Communication Technology, page 307-322. Springer, (2019)Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (11): 3155-3164 (2014)Post-P&R Performance and Power Analysis for RRAM-Based FPGAs., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (3): 639-650 (2018)Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only)., , , , and . FPGA, page 262. ACM, (2015)A high-performance low-power near-Vt RRAM-based FPGA., , and . FPT, page 207-214. IEEE, (2014)Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (5): 2028-2036 (May 2023)End-to-end Automatic Logic Optimization Exploration via Domain-specific Multi-armed Bandit., , , and . CoRR, (2022)A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal., , , , and . CoRR, (2021)