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Disambiguation of "Eble, John C."

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A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI.

, , , , , , and . ISSCC, page 370-371. IEEE, (2010)

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John C Maraldo

John C Eisele

John C Angehrn

Katharina Eble

Axel Eble

 

Other publications of authors with the same name

A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI., , , , , , and . ISSCC, page 370-371. IEEE, (2010)A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching., , , , , , , , , and . CICC, page 1-4. IEEE, (2012)A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 49 (4): 1048-1062 (2014)Power-efficient I/O design considerations for high-bandwidth applications., , , , , , , , and . CICC, page 1-8. IEEE, (2011)A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 49 (1): 127-139 (2014)A physical alpha-power law MOSFET model., , , , and . IEEE J. Solid State Circuits, 34 (10): 1410-1414 (1999)A 2.3-4GHz injection-locked clock multiplier with 55.7% lock range and 10-ns power-on., , , , , and . CICC, page 1-4. IEEE, (2012)Impact of extrinsic and intrinsic parameter fluctuations on CMOS circuit performance., , , and . IEEE J. Solid State Circuits, 35 (8): 1186-1193 (2000)A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 50 (4): 814-827 (2015)A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems., , , , , , , , , and 6 other author(s). ISSCC, page 306-307. IEEE, (2013)