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A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.

B. Keller, M. Cochet, B. Zimmer, J. Kwak, A. Puggelli, Y. Lee, M. Blagojevic, S. Bailey, P. Chiu, P. Dabbelt, C. Schmidt, E. Alon, K. Asanovic, and B. Nikolic. IEEE J. Solid State Circuits, 52 (7): 1863-1875 (2017)

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Alon Geller

Noga Alon

Alon Tauber

Leonard Ekangwo Elad

Alon Padovicz

Other publications of authors with the same name

A Real-Time, Analog/Digital Co-Designed 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET.A. Wang, W. Bae, J. Han, S. Bailey, P. Rigge, O. Ocal, Z. Wang, K. Ramchandran, E. Alon, and B. Nikolic. ESSCIRC, page 322-325. IEEE, (2018)A 4.78mm2 fully-integrated neuromodulation SoC combining 64 acquisition channels with digital compression and simultaneous dual stimulation.D. Yeager, W. Biederman, N. Narevsky, J. Leverett, R. Neely, J. Carmena, E. Alon, and J. Rabaey. VLSIC, page 1-2. IEEE, (2014)A 6b 46GS/s ADC with >23GHz BW and sparkle-code error correction.Y. Duan, and E. Alon. VLSIC, page 162-. IEEE, (2015)A frequency-reconfigurable multi-standard 65nm CMOS digital transmitter with LTCC interposers.N. Kuo, B. Yang, C. Wu, L. Kong, A. Wang, M. Reiha, E. Alon, A. Niknejad, and B. Nikolic. A-SSCC, page 345-348. IEEE, (2014)Open-Source EDA Tools and IP, A View from the Trenches.E. Alon, K. Asanovic, J. Bachrach, and B. Nikolic. DAC, page 79. ACM, (2019)BAG: a designer-oriented integrated framework for the development of AMS circuit generators.J. Crossley, A. Puggelli, H. Le, B. Yang, R. Nancollas, K. Jung, L. Kong, N. Narevsky, Y. Lu, N. Sutardja and 3 other author(s). ICCAD, page 74-81. IEEE, (2013)A 12.8GS/s time-interleaved SAR ADC with 25GHz 3dB ERBW and 4.6b ENOB.Y. Duan, and E. Alon. CICC, page 1-4. IEEE, (2013)Design of high-speed wireline transceivers for backplane communications in 28nm CMOS.J. Savoj, K. Hsieh, P. Upadhyaya, F. An, J. Im, X. Jiang, J. Kamali, K. Lai, Z. Wu, E. Alon and 1 other author(s). CICC, page 1-4. IEEE, (2012)Design and Automatic Generation of High-Speed Circuits for Wireline Communications.J. Han, E. Chang, and E. Alon. ISOCC, page 40-41. IEEE, (2019)A 32nm fully integrated reconfigurable switched-capacitor DC-DC converter delivering 0.55W/mm2 at 81% efficiency.H. Le, M. Seeman, S. Sanders, V. Sathe, S. Naffziger, and E. Alon. ISSCC, page 210-211. IEEE, (2010)

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Disambiguation of "Alon, Elad"

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A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.

Please choose a person to relate this publication to

Alon Geller

Noga Alon

Alon Tauber

Leonard Ekangwo Elad

Alon Padovicz

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Alon, Elad"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.

Please choose a person to relate this publication to

Alon Geller

Noga Alon

Alon Tauber

Leonard Ekangwo Elad

Alon Padovicz

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.