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Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures., , , , , , и . Integr., 41 (1): 38-48 (2008)A Smaller, Faster, and More Energy-Efficient Complementary STT-MRAM Cell Uses Three Transistors and a Ground Grid: More Is Actually Less., , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 25 (4): 1204-1214 (2017)Array Interleaving - An Energy-Efficient Data Layout Transformation., , , , и . ACM Trans. Design Autom. Electr. Syst., 20 (3): 44:1-44:26 (2015)Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors., , , , и . ACM Trans. Design Autom. Electr. Syst., 12 (4): 41 (2007)Vertical M1 Routing-Aware Detailed Placement for Congestion and Wirelength Reduction in Sub-10nm Nodes., , , , , и . DAC, стр. 51:1-51:6. ACM, (2017)Exploiting finite precision information to guide data-flow mapping., , , , и . DAC, стр. 248-253. ACM, (2010)Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level Parallelism., , , , и . PATMOS, том 4148 из Lecture Notes in Computer Science, стр. 12-23. Springer, (2006)The defect-centric perspective of device and circuit reliability - From individual defects to circuits., , , , , , , , , и 5 other автор(ы). ESSDERC, стр. 218-225. IEEE, (2015)CMOS low-power transceivers for 60GHz multi Gbit/s communications., , , , , , , , , и 7 other автор(ы). CICC, стр. 1-8. IEEE, (2013)Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors., , , , , и . J. Signal Process. Syst., 64 (1): 75-92 (2011)