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Simulating Wrong-Path Instructions in Decoupled Functional-First Simulation., , , and . ISPASS, page 124-133. IEEE, (2023)Efficient Asynchronous RPC Calls for Microservices: DeathStarBench Study., and . CoRR, (2022)Many-core graph workload analysis., , , , and . SC, page 22:1-22:11. IEEE / ACM, (2018)STM2: A Parallel STM for High Performance Simultaneous Multithreading Systems., , , , , , and . PACT, page 221-231. IEEE Computer Society, (2011)Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory., , , , , , and . PACT, page 361-371. IEEE Computer Society, (2011)DRAM Bandwidth and Latency Stacks: Visualizing DRAM Bottlenecks., , and . ISPASS, page 322-331. IEEE, (2022)Automatic SMT threading for OpenMP applications on the Intel Xeon Phi co-processor., , , , , and . ROSS@ICS, page 7:1-7:7. ACM, (2014)Towards a GraphBLAS Implementation for Go., , and . IPDPS Workshops, page 1-4. IEEE, (2022)Undersubscribed threading on clustered cache architectures., , , , , and . HPCA, page 678-689. IEEE Computer Society, (2014)From Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype., , , , , , , and . ARC, volume 6578 of Lecture Notes in Computer Science, page 350-362. Springer, (2011)