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Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.

C. Xue, T. Chang, T. Chang, H. Kao, Y. Chiu, C. Lee, Y. King, C. Lin, R. Liu, C. Hsieh, K. Tang, W. Chen, M. Chang, J. Liu, J. Li, W. Lin, W. Lin, J. Wang, W. Wei, and T. Huang. IEEE J. Solid State Circuits, 55 (1): 203-215 (2020)

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Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Other publications of authors with the same name

Challenges and Circuit Techniques for Energy-Efficient On-Chip Nonvolatile Memory Using Memristive Devices.M. Chang, A. Lee, P. Chen, C. Lin, Y. King, S. Sheu, and T. Ku. IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (2): 183-193 (2015)A ReRAM Macro Using Dynamic Trip-Point-Mismatch Sampling Current-Mode Sense Amplifier and Low-DC Voltage-Mode Write-Termination Scheme Against Resistance and Write-Delay Variation.C. Lo, W. Lin, W. Lin, H. Lin, T. Yang, Y. Chiang, Y. King, C. Lin, Y. Chih, T. Chang and 1 other author(s). IEEE J. Solid State Circuits, 54 (2): 584-595 (2019)Self-Convergent Trimming SRAM True Random Number Generation With In-Cell Storage.P. Yeh, C. Yang, Y. Chang, Y. Chih, C. Lin, and Y. King. IEEE J. Solid State Circuits, 54 (9): 2614-2621 (2019)High Density Embedded 3D Stackable Via RRAM in Advanced MCU Applications.Y. Huang, Y. Hsieh, Y. Lin, Y. Chih, E. Wang, J. Chang, Y. King, and C. Lin. VLSI Technology and Circuits, page 1-2. IEEE, (2023)FinFET CMOS logic gates with non-volatile states for reconfigurable computing systems.Y. Chiang, W. Chien, Y. Chih, J. Chang, C. Lin, and Y. King. Integr., (2019)A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed.Z. Wang, Y. Liu, A. Lee, F. Su, C. Lo, Z. Yuan, J. Li, C. Lin, W. Chen, H. Chiu and 7 other author(s). IEEE J. Solid State Circuits, 52 (10): 2769-2785 (2017)A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors.A. Lee, C. Lo, C. Lin, W. Chen, K. Hsu, Z. Wang, F. Su, Z. Yuan, Q. Wei, Y. King and 8 other author(s). IEEE J. Solid State Circuits, 52 (8): 2194-2207 (2017)Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.C. Xue, T. Chang, T. Chang, H. Kao, Y. Chiu, C. Lee, Y. King, C. Lin, R. Liu, C. Hsieh and 10 other author(s). IEEE J. Solid State Circuits, 55 (1): 203-215 (2020)Low VDDmin Swing-Sample-and-Couple Sense Amplifier and Energy-Efficient Self-Boost-Write-Termination Scheme for Embedded ReRAM Macros Against Resistance and Switch-Time Variations.M. Chang, J. Wu, T. Chien, Y. Liu, T. Yang, W. Shen, Y. King, C. Lin, K. Lin, Y. Chih and 1 other author(s). IEEE J. Solid State Circuits, 50 (11): 2786-2795 (2015)7.4 A 256b-wordlength ReRAM-based TCAM with 1ns search-time and 14× improvement in wordlength-energyefficiency-density product using 2.5T1R cell.C. Lin, J. Hung, W. Lin, C. Lo, Y. Chiang, H. Tsai, G. Yang, Y. King, C. Lin, T. Chen and 1 other author(s). ISSCC, page 136-137. IEEE, (2016)

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Disambiguation of "Lin, Chrong Jung"

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Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.

Please choose a person to relate this publication to

Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Lin Lin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lin, Chrong Jung"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.

Please choose a person to relate this publication to

Jung-Hsing Lin

Peh-jung Lin

Bei-Jung Lin

Lin Lin

Lin Lin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors.