Author of the publication

A new hardware countermeasure for masking power signatures of crypto cores.

, , , , , , and . ReCoSoC, page 169-176. Univ. Montpellier II, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Magnetic tunnelling junction based FPGA., , , and . FPGA, page 123-130. ACM, (2006)Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability., , , , , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 128-137. Springer, (2004)A Dynamically Reconfigurable Architecture for Embedded Systems., , , and . IEEE International Workshop on Rapid System Prototyping, page 32-37. IEEE Computer Society, (2001)A new hardware countermeasure for masking power signatures of crypto cores., , , , , , and . ReCoSoC, page 169-176. Univ. Montpellier II, (2005)FSPICE: a tool for fault modelling in MOS circuits., , and . Integr., 3 (3): 245-255 (1985)New non-volatile FPGA concept using Magnetic Tunneling Junction., , , and . ISVLSI, page 269-276. IEEE Computer Society, (2006)Concurrent Design of Hardware/Software Dedicated Systems., , , and . FPL, volume 1142 of Lecture Notes in Computer Science, page 410-414. Springer, (1996)Remanent SRAM Structure for Runtime Reconfigurable FPGA., , , and . ReCoSoC, page 124-130. Univ. Montpellier II, (2006)Electrical analysis and modeling of floating-gate fault., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 11 (11): 1450-1458 (1992)Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures., , , , and . IPDPS, IEEE Computer Society, (2005)