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Disambiguation of "Wang, Wei-Ping"

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Binary-oscillator networks: bridging a gap between experimental and abstract modeling of neural networks.

. Neural Comput., 8 (2): 319-339 (1996)

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Wei Ping

Ping Wang

Ping Wang

Wei Wang

Wei Wang

 

Other publications of authors with the same name

A 20nm 112Mb SRAM in High-к metal-gate with assist circuitry for low-leakage and low-VMIN applications., , , , , , , , , and 5 other author(s). ISSCC, page 316-317. IEEE, (2013)15.1 A 5nm 135Mb SRAM in EUV and High-Mobility-Channel FinFET Technology with Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-VMIN Applications., , , , , , , , , and 2 other author(s). ISSCC, page 238-240. IEEE, (2020)Safety Pre-Control of Stope Roof Fall Accidents Using Combined Event Tree and Fuzzy Numbers in China's Underground Noncoal Mines., , , , and . IEEE Access, (2020)A 5-nm 135-Mb SRAM in EUV and High-Mobility Channel FinFET Technology With Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-VMIN Applications., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 56 (1): 179-187 (2021)Fault Recovery Routing in Wide Area Packet Networks, , , and . page 1077-1086. (1997)A HKMG 28nm 1GHz fully-pipelined tile-able 1MB embedded SRAM IP with 1.39mm2 per MB., , , , , , and . CICC, page 1-4. IEEE, (2013)Binary-oscillator networks: bridging a gap between experimental and abstract modeling of neural networks.. Neural Comput., 8 (2): 319-339 (1996)A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology., , , , , , , , , and . VLSI Technology and Circuits, page 1-2. IEEE, (2023)